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PROJECT ID: QNT-2025 // QUANTUM MACHINE LEARNING

QC1: Hardware-Efficient VQC for IQM Spark

QC1 is Axion's main research project: a reproducible, hardware-aware quantum machine learning program built around IQM Spark ODRA 5. The team moved beyond a single accuracy claim and built a full evaluation framework for banknote authentication, comparing a simulator-oriented CRX/CRY ansatz with an ODRA-native RZ/CZ design across compilation cost, fidelity proxies, expressibility diagnostics, noise-aware cross-validation, and direct physical-QPU performance.

Flagship Project ODRA 5 IQM Spark Quantum ML Presented at IEEE qCCL 2026
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Physical QPU Accuracy at L=4
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Mean Advantage vs Simulator Ansatz at L=4
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Compiled Depth Reduction at L=6
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Evaluation Axes
[01]

Research Program

From Classifier to Methodology

The benchmark uses the UCI Banknote Authentication dataset as a compact, measurable binary-classification task for near-term hardware. The current pipeline engineers a fifth interaction feature, scales all inputs to an angle-encoding range, and evaluates five-qubit VQC designs on both exact statevector references and IQM Spark ODRA 5 hardware.

Dataset 1,372 UCI banknote samples, 4 wavelet features plus variance x skewness interaction
Encoding Five scaled features mapped to five qubits with angle encoding
Hardware IQM Spark ODRA 5 at Wrocław University of Science and Technology

Core Finding

On physical hardware, the ODRA-native RZ/CZ ansatz is not just tidier after transpilation; it changes the end-to-end result. At depth L=4, the tailored model reaches 87.6% accuracy and F1=0.846 on IQM Spark, compared with 74.5% accuracy and F1=0.583 for the simulator-oriented baseline under the same evaluation protocol.

Compared Ansatze ODRA-native RZ/CZ ring vs simulator-oriented CRX/CRY ring
Controlled Protocol Same folds, test samples, depth, checkpoints, and transpilation settings
Interpretation Hardware-native design is evaluated as a NISQ execution requirement, not as an isolated simulator metric
[02]

Conference Talk

2026 IEEE International Conference on Quantum Control, Computing, and Learning

Hardware-Efficient Ansatz Design and Noise-Aware Analysis of a Variational Quantum Classifier for IQM Spark

The QC1 abstract was peer-reviewed and accepted for an oral talk at IEEE qCCL 2026 in Aalborg, Denmark, presented in the Quantum Machine Learning session. The talk set out the hardware-efficient ansatz design, the five-axis evaluation framework, and the ODRA 5 physical-QPU results described on this page. Quantum processor access was provided by the Wrocław Centre for Networking and Supercomputing; the research was carried out at the Department of Artificial Intelligence, Wrocław University of Science and Technology.

Authors
Iwo Wojtakajtis, Maria Płatek, Rafał Balicki, Karina Leśkiewicz, Michał Szczęsny, Tomasz Kajdanowicz
Venue
IEEE qCCL 2026
Dates
July 1-3, 2026
Location
Aalborg, Denmark
Status
Accepted for an oral talk
[03]

Experiment and Branch Map

QC1 grew through many branches and experiment tracks. The public repository now consolidates that work into an installable package, notebooks, hardware scripts, checkpoints, and result artifacts.

eda / prototype

Dataset and First VQC Prototypes

Exploratory analysis, early angle encoding, and first hybrid classifier notebooks established the banknote benchmark and modeling loop.

dnn

Classical Baselines

The DNN branch and the classical ML notebook on main supplied context for the dataset and kept the quantum work anchored to measurable controls.

ansatz / wytrenowane_modele

Ansatz Families and Checkpoints

Simulator-oriented and ODRA-adapted ansatz variants were trained, compared, and saved as reusable weights for later studies.

fold_training / Szum

Noise-Aware Cross-Validation

Five-fold training and phenomenological expectation-value noise runs tested whether the ansatze were robust or merely overfit to ideal simulation.

depth_6 / sim_6

Depth Scaling

Depth-2, depth-4, and depth-6 runs quantified how parameters, transpiled depth, gate counts, and noise sensitivity evolve as circuits grow.

Dania

QPU-Only Hardware Studies

An isolated branch collected physical IQM Spark notebooks for fidelity, repeated-shot evaluation, model testing, and ansatz/depth comparisons.

main

Clean Package and Result Artifacts

The current mainline packages shared logic under qbanknote, adds smoke tests, scripted IQM metric runners, KL/Meyer-Wallach workflows, methodology notes, and the shared result artifacts.

[04]

ODRA-Native vs Simulator-Oriented

The central QC1 comparison is not just which circuit trains best in a notebook. It asks which ansatz survives the translation from ideal circuit to the native gate set and calibration reality of IQM Spark.

Physical QPU classification at L=4
ODRA 87.6% accuracy / F1 0.846
SIM 74.5% accuracy / F1 0.583

Five-fold means under the same folds, samples, and shot protocol. The hardware-aligned ansatz wins in every fold, though the per-fold margin ranges from 4.3 to 21.1 pp.

Compiled physical depth at L=6, optimization level 1
ODRA 127
SIM 263

A 51.7% reduction in compiled depth for the ODRA-native circuit.

Native two-qubit gates at L=6
ODRA 60
SIM 87

The ODRA-native design avoids a large part of the decomposition overhead.

Estimated fidelity proxy at L=4
ODRA 61.56%
SIM 47.84%

Higher estimated physical reliability aligns with the hardware classification gap.

KL expressibility diagnostic
ODRA Better at L=4 and L=6
SIM Better at L=2 and L=8

Expressibility alone does not predict physical-QPU performance.

[05]

Five-Axis Evaluation Framework

Axis 01

Compiled Resource Costs

Physical depth, total gate counts, and native two-qubit gate counts after transpilation to IQM Spark.

Axis 02

Fidelity Proxies

Composite physical reliability estimates using one-qubit, two-qubit, and measurement error channels.

Axis 03

Expressibility Diagnostics

KL divergence to the Haar pairwise-fidelity law and Meyer-Wallach entanglement workflows for circuit-family behavior.

Axis 04

Noise-Aware Optimization

Five-fold CV under ideal and phenomenological expectation-value noise, plus LED capacity diagnostics.

Axis 05

End-to-End QPU Runs

Physical IQM Spark evaluation with pilot/final shot schedules, repeated runs, statevector references, and fold-level paired comparisons.

Research Team

Contributors

  • Iwo Wojtakajtis
  • Rafał Balicki
  • Karina Leśkiewicz
  • Maria Płatek
  • Michał Szczęsny